1. Field of the Invention
The present invention generally relates to package substrates and methods for fabricating the same, and more specifically, to a package substrate with a wire bonding metal layer formed on wire bonding pads and a method for fabricating the same.
2. Description of Related Art
Owing to the flourishing development of the electronics industry, the research and development of electronic products have a trend toward multi-function, high-performance products. To satisfy the packaging requirements of high integration and miniaturization for semiconductor packages, package substrates for carrying semiconductor chips have been evolving from single-layer into multi-layer boards. Therefore, given a limited space, circuit area available to a package substrate is expandable by interlayer connection technology in order to cope with the application demands for high-density integrated circuits.
At present, package substrates for carrying semiconductor chips include wire bond package substrates, chip scale package (CSP) substrates, flip chip ball grid array (FCBGA) substrates, and others. To meet the operational requirements for microprocessors, chipsets, and graphic chips, improvements have to be made in delivery of chip signals, bandwidth, impedance control, etc. of circuit-laden circuit boards with a view to answering to the development trends of high I/O number packages. However, to fit in with the developing trend of semiconductor package towards light weight, small size, multi functions, high speed, and high frequency, circuit boards for packaging semiconductor chips have been trending towards fine lines and small apertures; size of circuit lines of circuit board, including line width, spaces between lines, aspect ratio, etc., has been reduced from the traditional 100 μm to below 25 μm presently, and the development trend is continuously towards smaller lines with great precision.
Please refer to FIGS. 1A and 1B, which are cross-sectional views of a fabrication method of a known package substrate that has wire bonding metal layer formed on its wire bonding pads; wherein as shown in FIG. 1A, provide first a substrate body 10, and then form a plurality of wire bonding pads 101 on at least a surface of the substrate body 10, and the wire bonding pads 101 have plating lines 102, also form an insulating passivation layer 11 on the substrate body 10 and the wire bonding pads 101, and then form a plurality of apertures of insulating passivation layer 110 in the insulating passivation layer 11 to correspondingly expose each of the wire bonding pads 101 and part surface of the substrate body 10; as shown in FIG. 1B, form a wire bonding metal layer 12 of, e.g. nickel/gold (Ni/Au), on the wire bonding pads 101 by using the plating lines 102 as an electrical conduction path.
However, the wire bonding metal layer 12 is formed on the wire bonding pads 101 by means of electroplating via the plating lines 102; and since the plating lines 102 must be laid on the substrate body 10, a great deal of area of the substrate body 10 is taken, thereby being unable to reach objectives of high density wiring and fine spacing between wire bonding pads.
Please refer to FIGS. 2A and 2B, which are cross-sectional views of another fabrication method of a known package substrate that has wire bonding metal layer formed on its wire bonding pads; as shown in FIG. 2A, provide a substrate body 20, and form a plurality of wire bonding pads 201 on at least one surface of the substrate body 20, and then form an insulating passivation layer 21 on the substrate body 20 and the wire bonding pads 201, and subsequently form a plurality of apertures of insulating passivation layer 210 in the insulating passivation layer 21 to correspondingly expose each of the wire bonding pads 201 and part surface of the substrate body 20; next, as shown in FIG. 2B, form a wire bonding metal layer 22 on the wire bonding pads by means of chemical deposition.
As stated above, chemical deposition is applicable to forming wire bonding metal layer 22 on the wire bonding pads 201, however, a sufficient thickness of wire bonding metal layer 22 costs highly, also wire bonding metal layer 22 formed by means of chemical deposition has softer texture and has poor bonding capability with wire of subsequent wire bonding process, thereby being disadvantageous to application demands of high number of pins.
Please refer to FIGS. 3A through 3H, which are cross-sectional views illustrating a fabrication method of wire bonding metal layer formed on wire bonding pads by means of non plating lines (NPL) electroplating; wherein a substrate body 30 with a plurality of wire bonding pads 301 thereon is provided, and as shown in FIG. 3B, form an electroconductive layer 32 on the wire bonding pad 301 and part surface of the substrate body 30; as shown in FIG. 3C, form a first photoresist layer 33a on the electroconductive layer 32, and also form a plurality of first openings 330a in the first photoresist layer 33a to correspondingly expose the electroconductive layer 32 on area of each of the wire bonding pads 301; as shown in FIG. 3D, remove the electroconductive layer 32 inside the first openings 330a; as shown in FIG. 3E, form a second photoresist layer 33b on the first photoresist layer 33a and inside the first openings 330a, and then form a plurality of second openings 330b in the second photoresist layer 33b to expose each of the wire bonding pads 301 but cover the electroconductive layer 32 not covered by the first photoresist layer 33a inside the first openings 330a; since the electroconductive layer 32 is electrically connecting to the wire bonding pads 301, as shown in FIG. 3F, a wire bonding metal layer 34 is formed on the wire bonding pads 301 inside the second openings 330b by electroplating via the electroconductive layer 32; as shown in FIG. 3G, remove the second photoresist layer 33b, the first photoresist layer 33a, and the electroconductive layer 32 covered thereunder to expose the wire bonding pads 301 and the wire bonding metal layer 34 there above; and as shown in FIG. 3H, form an insulating passivation layer 35 on the substrate body 30 and the wire bonding metal layer 34, and then form a plurality of apertures of insulating passivation layer 350 to expose the wire bonding metal layer 34 on the wire bonding pads 301.
According to the abovementioned NPL method, sufficient thickness of wire bonding metal layer 34 can be obtained by electroplating and has cost lower than by chemical deposition, and the wire bonding metal layer 34 formed by electroplating has firmer texture, thereby having better bonding capability with wire of subsequent wire bonding process. However, the fabrication method is complicated and the cost is still high. Besides, the insulating passivation layer 35, which is formed after the wire bonding metal layer 34 has been formed, causes contamination to the wire bonding metal layer 34 readily, thereby resulting in unstable quality of the subsequent wire bonding.
Hence, it is a highly urgent issue in the industry for how to provide a package substrate that has wire bonding metal layer formed on its wire bonding pads and a method for fabricating the same, which are capable of providing high density wiring and fine spacing between wire bonding pads as well as enhancing bonding capability and being advantageous to application demands of high number of pins.